Название: Languages and Compilers for Parallel Computing: 32nd International Workshop Автор: Santosh Pande, Vivek Sarkar Издательство: Springer Год: 2021 Страниц: 177 Язык: английский Формат: epub Размер: 18.9 MB
This book constitutes the thoroughly refereed post-conference proceedings of the 32nd International Workshop on Languages and Compilers for Parallel Computing, LCPC 2019, held in Atlanta, GA, USA, in October 2019. The 8 revised full papers and 3 revised short papers were carefully reviewed and selected from 17 submissions. The scope of the workshop includes advances in programming systems for current domains and platforms, e.g., scientific computing, batch/ streaming/ real-time data analytics, Machine Learning, cognitive computing, heterogeneous/ reconfigurable computing, mobile computing, cloud computing, IoT, as well as forward-looking computing domains such as analog and quantum computing.
Embedded multicore processors running hard real-time applications such as engine control programs require an appropriate scheduling routine to meet the real-time deadline constraints. These applications typically consist of various conditional branches which change the flow of the program and the task executions based on sensors inputs and vehicle status information. Conventionally, dynamic on-line scheduling was the only option for such applications that have unpredictable runtime behaviors. However, techniques for compilers and schedulers allow static off-line scheduling to be applied to engine control programs by utilizing execution profile feedback methods to feed task execution time information to the compiler. This paper is the first to compare dynamic scheduling and static scheduling schemes through the OSCAR multi-grain automatic parallelizing compiler and its overheads on an actual engine control program using an embedded multicore processor implemented on an FPGA.
Performance of Static and Dynamic Task Scheduling for Real-Time Engine Control System on Embedded Multicore Processor PostSLP: Cross-Region Vectorization of Fully or Partially Vectorized Code FLARE: Flexibly Sharing Commodity GPUs to Enforce QoS and Improve Utilization Foundations of Consistency Types for a Higher-Order Distributed Language Common Subexpression Convergence: A New Code Optimization for SIMT Processors Using Performance Event Profiles to Deduce an Execution Model of MATLAB with Just-In-Time Compilation CLAM: Compiler Leasing of Accelerator Memory Abstractions for Polyhedral Topology-Aware Tasking [Position Paper] SWIRL ++ : Evaluating Performance Models to Guide Code Transformation in Convolutional Neural Networks A Structured Grid Solver with Polyhedral+Dataflow Representation CubeGen: Code Generation for Accelerated GEMM-Based Convolution with Tiling
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