Название: Quantum-Dot Cellular Automata Circuits for Nanocomputing Applications
Автор: Trailokya Nath Sasamal, Hari Mohan Gaur, Ashutosh Kumar Singh
Издательство: CRC Press
Год: 2024
Страниц: 253
Язык: английский
Формат: pdf (true)
Размер: 34.8 MB

This book provides a composite solution for optimal logic designs for Quantum-Dot Cellular Automata based circuits. It includes the basics of new logic functions and novel digital circuit designs, quantum computing with QCA, new trends in quantum and quantum-inspired algorithms and applications, and algorithms to support QCA designers.

Futuristic Developments in Quantum-Dot Cellular Automata Circuits for Nanocomputing includes QCA-based new nanoelectronics architectures that help in improving the logic computation and information flow at physical implementation level. The book discusses design methodologies to obtain an optimal layout for some of the basic logic circuits considering key metrics such as wire delays, cell counts, and circuit area that help in improving the logic computation and information flow at physical implementation level. Examines several challenges toward QCA technology like clocking mechanism, floorplan which would facilitate manufacturability, Electronic Design Automation (EDA) tools for design and fabrication like simulation, synthesis, testing etc.

The growing demand of portable systems and the requirement for limited power consumption in high-density ULSI circuits has led to rapid and constructive development in low-power design in recent years. The driving force behind these advancements is portable applications that require low power dissipation and high throughput, such as personal digital assistants, notebook computers, portable communication devices. Low-power output of integrated digital circuits has emerged as the most efficient and fast-growing field of CMOS design. Mobile phones, microprocessors, laptops, and other high-performance digital applications are among the many battery-operated portable devices and applications where the requirement for low-power design is becoming a significant problem. High operating speeds and increasing chip density result in the design of extremely complex chips with high clock frequencies. When a chip’s clock frequency rises, the chip’s power consumption and consequently its temperature rise linearly. Since the finished heat has to be effectively removed to keep the chip temperature in a tolerable condition, the cost of packaging and heat removal becomes an important and useful factor. Improvements in scaling with decreased threshold and supply power voltages lead to improvements in the leakages in MOS transistors.

The book is intended for students and researchers in electronics and computer disciplines who are interested in this rapidly changing field under the umbrella of courses such as emerging nanotechnologies and its architecture, low-power digital design. The work will also help the manufacturing companies/industry professionals, in nanotechnology and semiconductor engineers in the development of low power quantum computers.




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