Название: Layout Techniques for Integrated Circuit Designers
Автор: Mikael Sahrling
Издательство: Artech House
Год: 2022
Страниц: 355
Язык: английский
Формат: pdf (true)
Размер: 15.5 MB

This book provides complete step-by-step guidance on the physical implementation of modern integrated circuits, showing you their limitations and guiding you through their common remedies. The book describes today's manufacturing techniques and how they impact design rules. You will understand how to build common high frequency devices such as inductors, capacitors and T-coils, and will also learn strategies for dealing with high-speed routing both on package level and on-chip applications. Numerous algorithms implemented in Python are provided to guide you through how extraction, netlist comparison and design rule checkers can be built. The book also helps you unravel complexities that effect circuit design, including signal integrity, matching, IR drop, parasitic impedance and more, saving you time in addressing these effects directly. You will also find detailed descriptions of software tools used to analyze a layout database, showing you how devices can be recognized and connectivity accurately assessed. The book removes much of fog that often hides the inner workings of layout related software tools and helps you better understand: the physics of advanced nodes, high speed techniques used in modern integrated technologies, and the inner working of software used to analyze layout databases. This is an excellent resource for circuit designers implementing a schematic in a layout database, especially those involved in deep submicron designs, as well as layout designers wishing to deepen their understanding of modern layout rules.

With regard to Python code implementation, the code examples in this part of the book are implemented in the readily available and perhaps most popular coding language: Python. Furthermore, it was chosen for its ability to present compact code that is also easy to read. The main idea of the provided code samples is to illustrate the ideas behind the verification stage algorithms. There has been little attempt to write efficient code, neither memory usage nor speed has been optimized to any degree. The hope is that providing simple code examples will inspire the reader to write his or her own codes, in a preferably faster language such as C and C++. With this in mind, the codes have not been tested much beyond the provided examples. There are in total some 5,000 lines in the codes and it is unfeasible to include them all in a book like this. Instead we will include parts of the codes, for example, basic data structures, short examples intended to illuminate some point of the discussion. With some trivial and noncritical codes, only the header section is displayed. The full code will be available online at www.fastictechniques.com. On this site, up-to-date codes and various developments will be posted on a regular basis.




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