Автор: Richard Munden
Название: ASIC and FPGA Verification: A Guide to Component Modeling
Издательство: Morgan Kaufmann
Год: 2004
ISBN: 0125105819
Серия: Systems on Silicon
Язык: English
Формат: pdf
Размер: 5,7 mb
Страниц: 336

Based on the VHDL/VITAL standard, these models include timing constraints and propagation delays that are required for accurate verification of today’s digital designs.

ASIC and FPGA Verification: A Guide to Component Modeling expertly illustrates how ASICs and FPGAs can be verified in the larger context of a board or a system. It is a valuable resource for any designer who simulates multi-chip digital designs.

– Provides numerous models and a clearly defined methodology for performing board-level simulation.
– Covers the details of modeling for verification of both logic and timing.
– First book to collect and teach techniques for using VHDL to model "off-the-shelf" or "IP" digital components for use in FPGA and board-level design verification.